Subscribe to RSS feed for 'Low-Latency.com'.Category: LL-Benchmark Initiatives

Stac Benchmark Council Issues First-Ever Standard Benchmark Specifications for Trading Systems »

The Securities Technology Analysis Center’s (Stac) Benchmarking Council – a group of 40 leading trading firms formed a year ago – has approved the Stac-M1 Benchmark specifications, the first industry-standard benchmark for trading technology.

READ THE REST

AMD Backs Stac Lab as Innovation Sponsor »

The Securities Technology Analysis Center (Stac) today announced that AMD has become an official Innovation Sponsor for the Manhattan-based Stac Lab. AMD is also a member of the Stac Benchmark Council.

READ THE REST

Stac Posts Test Results for Guaranteed Messaging Workloads on Solace 3230 Content Router »

Stac has just posted test results of guaranteed messaging workloads on the Solace 3230 Content Router from Solace Systems. The tests included Linux-based clients connected to the router via switched gigabit Ethernet. The tests involved heavy duty message rates in client configurations that are relevant to trading scenarios like order execution. In addition, one test case simulated a significant failure event (loss of connectivity to over a third of the clients, followed by recovery) and studied the impact this had on the other clients.

READ THE REST

Coral8 Joins Stac Benchmark Council and Stac Lab to Support Industry Standard Benchmarks and Open Product Evaluation »

CEP specialist Coral8 has joined the Stac Benchmark Council and has also provided the Stac Lab with its event-processing platform (EPP) for end-user evaluations.

READ THE REST

Aleri Joins Stac Benchmark Council and Makes Platform Available for Evaluation »

Aleri has joined the Securities Technology Analysis Center (Stac) Benchmark Council and has become the first event-processing platform (EPP) vendor to make its products available to Stac Lab for end user evaluations.

READ THE REST

Pete’s Blog: The Sun Sets For Larry, Rises For Others? »

It’s been a while I know, but this blogging business just keeps getting pushed to the bottom of the list. My thanks then to “Uncle” Tom Groenfeldt for alerting me on his blog to the recent departure from Sun Microsystems of Larry Scott, where he was vice president for financial services. Larry is going somewhere, though he’s not telling, at least not yet. But his departure jogged my memory to some offline conversations I’ve been having of late, not least during the Linux on Wall Street conference that I chaired the other week.

READ THE REST

Stac Tests More 10GigE Technology »

Stac has released more test results on 10 Gigabit Ethernet (10GigE), using technology from two vendors: Blade Network Technologies (BNT) and Chelsio Communications. BNT offers a 10GigE switch module for the IBM BladeCenter, and Chelsio provides 10 GigE NICs. Stac tested the technology under market data workloads because the vendors believed that the combination of the high-speed BNT switch with Chelsio’s TCP Offload Engine (TOE) would improve both latency and throughput in market data environments. The tests revealed the lowest mean latency and the lowest standard deviation of latency ever reported with RMDS.

READ THE REST

Stac Report: Teak Technologies AZ-10GE with RMDS »

Securities Technology Analysis Center (Stac) has released its first test results involving 10 Gigabit Ethernet (10GigE) technology. Teak Technologies provides 10GigE switches and NICs under the product name AZ-10GE. One of the distinguishing features that Teak claims is “Acceleration Zone Ethernet”, a hardware-based collection of algorithms that detect, diagnose and rectify networking artifacts that hinder application performance and prevent a firm from achieving the full potential of 10GigE.

READ THE REST

New Stac Report Available: RMDS 6 on a 45nm Intel Xeon “Harpertown” Processor »

Intel recently released quad-core Xeon processors (code named “Harpertown”) based on a 45nm manufacturing process, which the company claims significantly reduce power consumption compared to its previous generation of quad-core processors (”Clovertown”). Securities Technology Analysis Center (Stac) performed a study comparing the power consumption of a server using Harpertown processors to the same server using Clovertown processors, running a market data load of 2 million updates per second across a stacked RMDS configuration that utilised as much of the eight cores in this system as possible. The Harpertown processor decreased the server’s overall power consumption by 16 per cent (333 watts versus 395 watts) and increased the server’s market data efficiency (updates per second per watt) by 19 per cent (6010 ups/W versus 5060 ups/W).

Stac News Release External Link

Technorati Tags: , , , , ,

Sun Becomes Innovation Sponsor at Stac »

Sun has joined the Securities Technology Analysis Center (Stac) Benchmark Council to help define standard performance metrics for trading technologies and has become an Innovation Sponsor for the Manhattan-based Stac Lab. On the Stac Benchmark Council, Sun will contribute to specifications under consideration by its participating trading firms. As an Innovation Sponsor, Sun is providing the lab with several of its latest technologies, including the 2U Sun Fire X4450 server with four quad-core Intel Xeon processors, the Sun Fire X4600 server with 8 AMD Opteron processors, and the 64-thread Sun T5120 server with UltraSPARC T2 processors and integrated 10 Gigabit Ethernet controllers.

Stac News Release External Link

Technorati Tags: , , , , , , , , , , , , ,

GemStone, IBM, Intel Demonstrate Sub-Millisecond Performance in Zero-Loss Transaction Benchmark »

The Securities Technology Analysis Center (Stac) has tested GemCache Data Transactions, an integrated solution from GemStone Systems, IBM, and Intel configured to handle high-speed trade order messages. The focus of the benchmark was to measure latency at different order rates for a system that was configured for zero data loss. The system consisted of GemFire Enterprise 5.0 software, Red Hat Enterprise Linux 4.4, IBM eServer BladeCenter HS21 servers with Intel Xeon Quad Core 5355 processors, and SDP over Cisco SFS InfiniBand. The report can be accessed on the GemStone Web site by visiting www.gemstone.com. A preview of the next GemCache benchmark on scalability will be available in Q1 2008.

Gemstone News Release External Link

Technorati Tags: , , , , , , , , , ,

Quanthouse, Intel Decode Two Million Messages Per Second on Multicore Intel Xeon Processor »

Quanthouse’s Quantfeedhandler, its feed handler technology to standardise exchange raw market data feeds, is able to decode more than two million messages per second, benchmark tests carried out at fasterLAB, the Intel low latency lab in London, on several versions of the multi-core Intel Xeon platform, have shown.

Technorati Tags: , , , , , ,

Stac Benchmark Council Holds First General Meeting »

The first general meeting of the Stac Benchmark Council took place on December 17 2007 at Credit Suisse in New York. Despite the proximity to the holidays, 74 representatives of 40 firms attended to make connections with their peers in the industry and share views on technology, measurement and the council. Andy Brown, CTO of infrastructure at Credit Suisse, kicked off the meeting with some remarks on the technical challenges facing securities firms today and his belief in the valuable role of Stac and the Stac Benchmark Council. The Stac team then presented an overview of the council: why standard benchmarks are necessary, how the council is organised and the role that Stac is playing as a catalyst. To view the presentation, follow the links at www.Stacresearch.com/council.

Stac News Release External Link

Technorati Tags: , , ,

CME Promises Reduced Message Response Time »

CME Group is to launch an upgrade to the CME Globex electronic trading platform that will significantly reduce message response time, as part of a raft of technology enhancements. During testing, under a replay of peak market conditions, the upgraded CME Globex platform demonstrated a more than 50 per cent reduction in response time, from an average of 31 milliseconds down to around 16.5 milliseconds. In 2007 an average 8.5 million contracts a day traded electronically at CME Group.

CME News Release External Link

Technorati Tags: , ,

Intel, QuIC Financial Technologies Partner to Test Faster, Lower Latency Solution »

QuIC Financial Technologies, provider of risk management, pricing and financial analytics solutions, has partnered with Intel for testing of Intel’s new Harpertown quad core 45Nm processors. QuIC’s testing of Intel’s new Harpertown processors showed promising double digit performance improvement results in client risk management and simulation trials, the partners say. QuIC’s testing also found that in using its latest generation of 45Nm quad-core IntelXeon processors, Intel has managed to deliver ultra low latency and significant performance increases in algorithmic trading, direct market access and market data delivery.

QuIC News Release External Link

Technorati Tags: , , , , , , , ,

Stac Tests Latency on HP Blade Servers with Gigabit Ethernet, Voltaire InfiniBand »

Stac has released a study of latency on HP c-Class Blade Servers with Gigabit Ethernet (GbE) and Voltaire InfiniBand. The system used Reuters Market Data System (RMDS) 6, running on HP BL460c Blades with 2 x Dual Core Intel Xeon 5160 3.0 GHz processors and Red Hat Enterprise Linux 4.4. Stac investigated latency on Gigabit Ethernet versus Voltaire InfiniBand using a traditional RMDS topology in an identical system environment. It also tested a stacked RMDS topology that maximised the utilisation of cores while also taking into consideration factors in real customer deployments.

READ THE REST

Intel, StreamBase, DSAL Do Further Real-Time Event Processing Tests »

Data Stream Analysis Limited (DSAL), provider of real-time complex data and event processing solutions, has released results from the second in a series of performance tests carried out at Intel facilities using the StreamBase complex event processing (CEP) engine running on Intel processors. The tests were conducted at Intel’s Low Latency Laboratory at Winnersh in Berkshire, UK, and were carried out on calculations of aggregated values used in algorithmic trading strategies. The results achieved were: 48 per cent - increase in updates processed per second; 53 per cent - reduction in the standard deviation between updates processed per second.

Technorati Tags: , , , , , , ,

BEA Benchmarks Weblogic Event Server on Intel’s Caneland »

BEA Systems has published a benchmark of its CEP offering - Weblogic Event Server - demonstrating microsecond-level latencies when processing one million events per second. The benchmark was run on Intel’s Caneland platform, compring four quad core processors.

READ THE REST

IBM Supports Stac Council and Stac Lab »

IBM has become an official innovation sponsor for the Manhattan-based Securities Technology Analysis Centre’s (Stac’s) Stac Lab and has joined the Stac Benchmark Council. As an innovation sponsor, IBM will provide the Lab with its latest BladeCenter systems and IBM Websphere Front Office for Financial Markets Version 2.0. IBM will, in turn, use the Lab as a foundation for testing workloads such as market data, analytics and execution for financial markets. Stac will add several IBM products to its “Racked-and-Stac’d” list, the inventory of hardware and software products with which Stac is ready to support customer projects. As a member of the Stac Benchmark Council, IBM will contribute to specifications under consideration by the Council’s participating trading firms.

Stac News Release External Link

Technorati Tags: , , , , , ,

Aspeed Doubles Performance With Intel’s Xeon 5400 »

Aspeed Software is the first of Intel’s financial markets software partners to publish performance figures leveraging Intel’s recently introduced Xeon 5400 chip. Benchmarking a single-threaded options pricing application, Aspeed reports that a 5400-based system delivers a 2.2-fold run time reduction while consuming just 13 percent more power, when compared to a Xeon 5100-based system.
READ THE REST